M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 388

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

<R>
8.1 Functions
operations (V850E/IA3: n = 0, V850E/IA4: n = 0, 1).
8.2 Features
386
The 16-bit 2-phase encoder input up/down counter/general-purpose timer (timer ENC1n) performs the following
• General-purpose timer mode (see 8.5.1 Operation in general-purpose timer mode)
• Up/down counter mode (see 8.5.2 Operation in UDC mode)
• Timer ENC1n
• Compare registers: 2 each
• Capture/compare registers: 2 each
• Interrupt request sources
• Capture request signal: 2 types each
• Count clock selectable through division by prescaler
• Timer clear
Free-running timer
PWM output
UDC mode A (mode 1, mode 2, mode 3, mode 4)
UDC mode B (mode 1, mode 2, mode 3, mode 4)
V850E/IA3: 1 channel (timer ENC10)
V850E/IA4: 2 channels (timers ENC10, ENC11)
• Capture/compare match interrupt request: 2 types each
• Compare match interrupt request: 2 types each
• The TMENC1n value can be latched using the valid edge of the TCLR1n and TCUD1n pins corresponding to
The following timer clear operations are performed according to the mode that is used.
(a) General-purpose timer mode: Timer clear operation is possible upon occurrence of match with CM1n0
(b) Up/down counter mode: The timer clear operation can be selected from among the following four conditions.
the capture/compare register as the capture trigger.
register set value.
(i) Timer clear performed upon occurrence of match with the CM1n0 register set value during TMENC1n
(ii) Timer clear performed only by external input.
(iii) Timer clear performed upon occurrence of match between TMENC1n count value and the CM1n0
(iv) Timer clear performed upon occurrence of external input and match between TMENC1n count value
count up operation, and timer clear performed upon occurrence of match with the CM1n1 register set
value during TMENC1n count down operation.
register set value.
and the CM1n0 register set value.
CHAPTER 8 16-BIT 2-PHASE ENCODER INPUT UP/DOWN COUNTER/
GENERAL-PURPOSE TIMER (TIMER ENC1n)
User’s Manual U16543EJ4V0UD