M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 255

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
• Capture operation
When the TPkCE bit is set to 1, the 16-bit counter starts counting. When the valid edge input to the TIPka pin is
detected, the count value of the 16-bit counter is stored in the TPkCCRa register, and a capture interrupt request
signal (INTTPkCCa) is generated.
The 16-bit counter continues counting in synchronization with the count clock. When it counts up to FFFFH, it
generates an overflow interrupt request signal (INTTPkOV) at the next clock, is cleared to 0000H, and continues
counting. At this time, the overflow flag (TPkOPT0.TPkOVF bit) is also set to 1. Confirm that the overflow flag is
set to 1 and then clear it to 0 by executing the CLR instruction via software.
Remark
INTTPkCC0 signal
INTTPkCC1 signal
TPkCCR0 register
TPkCCR1 register
INTTPkOV signal
TIPk0 pin input
TIPk1 pin input
16-bit counter
Figure 6-37. Basic Timing in Free-Running Timer Mode (Capture Function)
TPkOVF bit
TPkCE bit
k = 0, 2
FFFFH
0000H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
User’s Manual U16543EJ4V0UD
D
00
D
CLR instruction
Cleared to 0 by
10
D
00
D
D
01
10
D
11
CLR instruction
Cleared to 0 by
D
D
01
02
D
11
D
12
CLR instruction
Cleared to 0 by
D
02
D
D
03
12
D
13
D
03
D
13
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