M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 698

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.5.2 Restore
PC’s address.
696
Recovery from software exception processing is carried out by the RETI instruction.
By executing the RETI instruction, the CPU carries out the following processing and shifts control to the restored
<1> Loads the restored PC and PSW from EIPC and EIPSW because the PSW.EP bit is 1.
<2> Transfers control to the address of the restored PC and PSW.
The processing of the RETI instruction is shown below.
Caution When the EP and NP bits are changed by the LDSR instruction during software exception
Remark
processing, in order to restore the PC and PSW correctly during recovery by the RETI
instruction, it is necessary to set the EP bit back to 1 and clear the NP bit to 0 using the
LDSR instruction immediately before the RETI instruction.
The solid line shows the CPU processing flow.
1
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Original processing restored
PC
PSW
RETI instruction
Figure 17-9. RETI Instruction Processing
PSW.EP
PSW.NP
0
0
EIPC
EIPSW
User’s Manual U16543EJ4V0UD
1
PC
PSW
FEPC
FEPSW

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