M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 205

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
<R>
<R>
TPnCTL0
TPnCTL1
TPmIOC0
(a) TMPn control register 0 (TPnCTL0)
(b) TMPn control register 1 (TPnCTL1)
(c) TMPm I/O control register 0 (TPmIOC0)
TPaSYE
Note Enable setting of the TPkEEE bit to 1 only when timer output (TOPk1) is used.
TPnCE
0/1
0
0
In this case, set the TPkCCR0 and TPkCCR1 registers to the same value.
TPmEST
Figure 6-11. Register Setting for Interval Timer Mode Operation (1/2)
0
0
0
TPkEEE
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
0/1
0
Note
0
0
0
0
User’s Manual U16543EJ4V0UD
TPmOL1
0/1
0
0
TPnCKS2 TPnCKS1 TPnCKS0
TPnMD2 TPnMD1 TPnMD0
TPmOE1 TP0OL0
0/1
0/1
0
0/1
0/1
0
TP0OE0
0/1
0/1
0
0, 0, 0:
Interval timer mode
0: Operate at count clock
1: Count operation
Select count clock
0: Stop counting
1: Enable counting
0: Disable TOP00 pin output
1: Enable TOP00 pin output
Setting of TOP00 pin output
level before count operation
0: Low level
1: High level
0: Disable TOPm1 pin output
1: Enable TOPm1 pin output
Setting of TOPm1 pin output
level before count operation
0: Low level
1: High level
selected in TPkCKS0 to
TPkCKS2 bits
by external event
count input signal
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