M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 256

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
254
TPmIOC0
TPkIOC1
TPnCTL0
TPnCTL1
(a) TMPn control register 0 (TPnCTL0)
(b) TMPn control register 1 (TPnCTL1)
(c) TMPm I/O control register 0 (TPmIOC0)
(d) TMPk I/O control register 1 (TPkIOC1)
Note The setting is invalid when the TPkCTL1.TPkEEE bit = 1.
Note Set the valid edge selection of the unused alternate external input signals to “No edge detection”.
TP0SYE
TPnCE
0/1
0
0
0
TPmEST
Figure 6-38. Register Setting in Free-Running Timer Mode (1/2)
0
0
0
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
TPkEEE
0/1
0
0
0
0
0
0
0
User’s Manual U16543EJ4V0UD
TPmOL1
TPkIS3
0/1
0/1
0
0
TPnCKS2 TPnCKS1 TPnCKS0
TPmOE1 TP0OL0
TPnMD2 TPnMD1 TPnMD0
TPkIS2
0/1
0/1
0/1
1
TPkIS1
0/1
0/1
0/1
0
TP0OE0
TPkIS0
0/1
0/1
0/1
1
0: Disable TOP00 pin output
1: Enable TOP00 pin output
Setting of TOP00 pin output level
before count operation
0: Low level
1: High level
0: Disable TOPm1 pin output
1: Enable TOPm1 pin output
Setting of TOPm1 pin output level
before count operation
0: Low level
1: High level
Select valid edge
of TIPk0 pin input
Select valid edge
of TIPk1 pin input
1, 0, 1:
Free-running timer mode
Select count clock
0: Stop counting
1: Enable counting
0: Operate with count
1: Count on external
clock selected by
TPkCKS0 to TPkCKS2 bits
event count input signal
Note
Note

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