M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 707

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.9 Periods in Which CPU Does Not Acknowledge Interrupts
acknowledged between an interrupt request non-sample instruction and the next instruction (interrupt is held pending).
17.10 Caution
related interrupt, which are alternate functions, do not occur (V850E/IA3: n = 0, 2 to 7, V850E/IA4: n = 0 to 7).
The CPU acknowledges an interrupt while an instruction is being executed.
The interrupt request non-sample instructions are as follows.
• EI instruction
• DI instruction
• LDSR reg2, 0x5 instruction (for PSW)
• Store instruction for the command register (PRCMD).
• Store instructions or bit manipulation instructions excluding tst1 instruction for the following registers.
Remark
Note that if a port is set to external interrupt input (INTPn), the timer/counter-related interrupt and A/D converter-
• Interrupt-related registers:
• Power save control register (PSC)
• Internal memory size switching register (IMS)
Interrupt control register (xxICn) and interrupt mask registers 0 to 3 (IMR0 to IMR3)
xx: Identification name of each peripheral unit (see Table 17-2)
n: Peripheral unit number (see Table 17-2)
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User’s Manual U16543EJ4V0UD
However, no interrupt will be
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