M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 180

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
178
(1) 16-bit counter
(2) CCR0 buffer register
Note V850E/IA4 only
Remarks 1. f
TOP3OFF
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TPnCNT register.
When the TPnCTL0.TPnCE bit = 0, the value of the 16-bit counter is FFFFH. If the TPnCNT register is read at
this time, 0000H is read.
The TPnCE bit is cleared to 0 after reset.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TPnCCR0 register is used as a compare register, the value written to the TPnCCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the
CCR0 buffer register, a compare match interrupt request signal (INTTPnCC0) is generated.
The CCR0 buffer register cannot be read or written directly.
The TPnCCR0 register is cleared to 0000H after reset, and the CCR0 buffer register is cleared to 0000H.
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
Note
2. For the TOP3OFF pin, see 10.3 (6) High-impedance output control registers 00, 01, 10, 11, 20,
/2
/4
/8
/16
/32
/64
/128
/256
21 (HZAmCTL0, HZAmCTL1).
XX
: Peripheral clock
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
Figure 6-4. TMP3 Block Diagram
User’s Manual U16543EJ4V0UD
register
CCR0
buffer
TP3CCR0
TP3CNT
Internal bus
Internal bus
16-bit counter
register
CCR1
buffer
TP3CCR1
Clear
INTTP3OV
INTTP3CC0
INTTP3CC1
TOP31
Note

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