M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 65

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(c) Internal memory size switching register (IMS)
The IMS register is used to make the internal RAM areas of the
(V850E/IA4) identical to those of the
operation of a program for the internal 6 KB RAM of the
(V850E/IA4) is checked by using the internal 12 KB RAM of the
μ
This register can be read or written in 8-bit units.
Reset sets this register to 00H.
Cautions 1. Write the IMS register before the internal RAM is accessed. This register can be
Remark
PD70F3186 (V850E/IA4).
When using a partner manufacturer’s tool, make the settings in accordance with the contents of
Cautions 1 to 3.
Moreover, enter the following to define the IMS register.
2. The IMS register is provided only in the flash memory versions; V850E/IA3
3. The sample startup routine supplied with the CA850 includes a code that clears the
written only once after reset has been released. If the 6 KB internal RAM is selected
and if addresses FFFC000H to FFFD7FFH are accessed, this register cannot be
written. When it is read, the CPU reads an undefined value.
(
mask ROM versions; V850E/IA3 (
and mistakenly writing to the IMS register does not affect the internal RAM size.
internal RAM area to 0. Therefore, setting the IMS register is required before the
zero-clear routine is executed.
When using the sample startup routine, add instructions <2> to <5> shown in
[Description example] below immediately after the __START label in the startup
routine.
“0x13” of instruction <2> is the set value of the VSWC register and “0x01” of
instruction <4> is the set value of the IMS register. Be sure to set a value to the IMS
register in accordance with the internal RAM size to be set (see Caution 2).
[Description example]
μ
PD70F3184) and V850E/IA4 (
<1>_ _START:
<2>mov
<3>st.b
<4>mov
<5>st.b
<6>mov
#define
CHAPTER 3 CPU FUNCTION
User’s Manual U16543EJ4V0UD
IMS
0x13,
r13,
0x01,
r12,
#_tp_TEXT, tp
:
:
(*((volatile unsigned char *)0xfffff9f0))
μ
PD703183 (V850E/IA3)/
μ
PD70F3186). The IMS register is not provided in the
μ
r13
VSWC
r12
IMS
PD703183) and V850E/IA4 (
μ
Add
PD703183 (V850E/IA3) and
μ
PD70F3184 (V850E/IA3)/
μ
PD703185 (V850E/IA4) when the
μ
PD70F3184 (V850E/IA3) and
μ
PD703185, 703186),
μ
PD70F3186
μ
PD703185
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