tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 90

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(0xFFFF_EE1C)
IMCGD
Be sure to set active state of the clear request if interrupt is enabled for clearing the Stop or Idle
(Note1) When using interrupts, be sure to follow the following sequence of action:
(Note 2) Settings must be performed while interrupts are disabled.
(Note 3) For clearing the Stop mode with TMP19A61, 13 factors, i.e., INT0 to INTB and KWUP0 to 3
(Note 4) Among the above 13 factors to be assigned as Stop/Idle clear request interrupts, INT0 to
mode.
Note: Default values for standby clearing request of IMCGD are different from the values to be used. Properly set them to
the specified values before use.
are available as clearing interrupts. Whether or not INT0 to INTB are to be used as Stop/ Idle
clearing interrupts as well as active state edge/level selection is set with CG.
INTB don't have to be set with CG if they are to be used as normal interrupts. Use INTC to
specify either H/L level, rising/falling edge, or both edges. If KWUP0 to 7 are to be used as
normal interrupts, set the active level by KWUPSTn and set High level with INTC. No CG
setting is necessary.
Interrupt factors other than those assigned as Stop/Idle clear requests are set in the INTC
block.
If shared with other general ports, enable the target interrupt input.
Set active state, etc., upon initialization.
Clear interrupt requests.
Enable interrupts
Bit Symbol
Read/Write
After Reset
Function
Bit Symbol
Read/Write
After Reset
Function
Bit Symbol
Read/Write
After Reset
Function
Bit Symbol
Read/Write
After Reset
Function
Always reads “0.”
Always reads “0.”
Always reads “0.”
Always reads “0.”
15
23
31
7
0
0
0
0
R
R
R
R
14
22
30
6
0
0
0
0
TMP19A61(rev1.0)-6-89
Set active state of KWUP
standby clear request.
reads “1.”
Always reads
“1.”
Always reads
“1.”
Be sure to set "01."
Always
EMCGC1
01: “H” level
13
21
29
5
1
1
1
1
R/W
R/W
R/W
R/W
EMCGC0
12
20
28
4
0
0
0
0
11
19
27
0
0
3
Always reads “0.”
Always reads “0.”
Always reads “0.”
Always reads “0.”
10
18
26
0
R
R
0
2
R
R
0
0
TMP19A61
17
25
0
0
1
9
KWUP
Clear input
0: Disable
1: Enable
KWUPE
R/W
R/W
R/W
R/W
16
24
N
0
0
8
0
0
0