tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 404

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15.5.11 Slave Address Match Detection Monitor
15.5.12 General-call Detection Monitor
15.5.13 Last Received Bit Monitor
Master
Master
Fig. 15.5.10.2 Example of Master B Losing Arbitration (D7A = D7B, D6A = D6B)
A
B
A master compares the SDA bus line level and the internal SDA output level at the rising of
the SCL line. If there is a difference between these two values, the master loses arbitration
and sets SBI0SR <AL> to "1."
When <AL> is set to "1," SBI0SR <MST, TRX> are cleared to "0," causing the SBI to
operate as a slave receiver. <AL> is cleared to "0" when data is written to or read from
SBI0DBR or data is written to SBI0CR2.
When the SBI operates as a slave device in the address recognition mode (I2CCR <ALS>
= "0"), SBI0SR <AAS> is set to "1" on receiving the general-call address or the slave
address that matches the value specified at I2CCR. When <ALS> is "1," <AAS> is set to
"1" when the first data word has been received. <AAS> is cleared to "0" when data is
written to or read from SBI0DBR.
When the SBI operates as a slave device, SBI0SR <AD0> is set to "1" when it receives the
general-call address; i.e., the eight bits following the start condition are all zeros. <AD0> is
cleared to "0" when the start or stop condition is detected on the bus.
SBI0SR <LRB> is set to the SDA line value that was read at the rising of the SCL line. In
the acknowledgment mode, reading SBISR <LRB> immediately after generation of the
INTSBI interrupt request causes ACK signal to be read.
Internal SCL
output
Internal SDA
output
Internal SCL
output
Internal SDA
output
Access to SBI0DBR or
SBI0CR2
<AL>
<MST>
<TRX>
D7A
D7B
1
1
TMP19A61
D6A
D6B
2
2
D5A
3
3
Internal SDA output is held high because
Master B has lost arbitraiton
(
D4A
rev1.0
4
4
D3A
)
5
-15-403
Clock output stops here
D2A
6
D1A
7
D0A
8
9
TMP19A61
D7A’ D6A’ D5A’ D4A’
1
2
3
4