tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 319

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

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Also, an external clock input may be used as the serial clock. The resulting baud rate
calculation is shown below:
1) UART mode
2) I/O interface mode
Baud rate calculation for an external clock input:
Baud rate = external clock input ÷ 16
In this, the period of the external clock input must be equal to or greater than 4/fsys.
Baud rate = external clock input
When double buffering is used, it is necessary to satisfy the following relationship:
When double buffering is not used, it is necessary to satisfy the following
relationship:
Therefore, when fsys = 54 MHz, the highest baud rate must be set to a rate lower
than 54÷16 = 3.375 (Mbps).
The baud rate examples for the UART mode are shown in Table 13.3.2.1 and Table
13.3.2.2.
If fsys = 54 MHz, the highest baud rate will be 54÷4÷16=844 (kbps).
Therefore, when fsys = 54 MHz, the highest baud rate must be set to a rate lower
than
54÷12 = 4.5 (Mbps)
(External clock input period) ＞ 12/fsys
(External clock input period) ＞ 16/fsys
TMP19A61 (rev1.0)-13-318
TMP19A61