tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 373

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

LITTLE
BIG
(0xFFFF_E80E)
(0xFFFF_E80D)
14.2 Register Description (Only for Channel 0)
HSC0MOD0
(Note) With <RXE> set to "0," set each mode register (HSC0MOD0, HSC0MOD1 and
Bit symbol
Read/Write
After reset
The registers must be byte accessed in setting them.
Function
HSC0MOD2). Then set <RXE> to "1."
Fig. 14-10 Serial Mode Control Register 0 (for HSIO0, HSC0MOD0)
Transmit
data bit-8
TB8
7
0
1: Enables
Handshake
function
control
0: Disables
CTS
CTS
CTSE
6
TMP19A61(rev. 1.0) 14-372
0
1: Enables
Receive
control
0: Disables
reception
reception
RXE
5
0
1: Enable
Wake-up
function
0: Disable
WU
4
0
R/W
11: 9-bit length
Serial transfer mode
00: I/O interface mode
01: 7-bit length
10: 8-bit length
Note) In the I/O interface mode, the serial control
register (HSC0CR) is used for clock selection
SM1
UART mode
UART mode
UART mode
3
0
Handshake function (
Wakeup function
0
1
0
1
9-bit UART
Interrupt when
received
Interrupt at RB8 = 1
Disable(transmission is
always allowed)
Enable
SM0
2
0
11: External clock
Serial transfer clock
(for UART)
00: Timer TB0OUT
01: Baud rate
10: Internal f
TMP19A61
CTS
SC1
(HSCLK0 input)
generator
clock
1
0
pin) enable
don’t care
Other modes
SYS
SC0
0
0