tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 317
tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
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13.3.2
Baud Rate Generator
The baud rate generator generates transmit and receive clocks to determine the serial
channel transfer rate.
The baud rate generator uses either the φ T1, φ T4, φ T16 or φ T64 clock supplied from the
7-bit prescaler. This input clock selection is made by setting the baud rate generator control
register, BR0CR <BR0CK1:0>.
The baud rate generator contains built-in dividers for divide by 1, N + m/16 (N=2~15,
m=0~15), and 16. The division is performed according to the settings of the baud rate
generator control registers BR0CR<BR0ADDE><BR0S3:0> and BR0ADD<BR0K3:0> to
determine the resulting transfer rate.
•
•
The N + (16 - K)/16 division function cannot be used in the I/O interface mode. Be sure to
divide by N, by setting BR0CR<BR0ADDE> to “0”.
•
1)
2)
1) UART mode
UART mode
I/O interface mode
Baud rate calculation to use the baud rate generator:
If BR0CR<BR0ADDE>=0
The setting of BR0ADD <BR0K3:0> is ignored and the counter is divided by N where N
is the value set to BR0CR<BR0S3:0>. (N = 1 to 16).
If BR0CR<BR0ADDE> = 1
(K=1 、 2 、 3 … 15) The N + (16 - K)/16 division function is enabled and the division is
made by using the values N (set in BR0CR<BR0S3:0>) and K (set in
BR0ADD<BR0K3:0>). (N = 2 to 15, K = 1 to 15)
The highest baud rate out of the baud rate generator is 843.75 kbps when φ T1 is 13.5
MHz
The fsys/2 frequency, which is independent of the baud rate generator, can be used as
the serial clock. In this case, the highest baud rate will be 1.68 Mbps when fsys is 54
MHz.
(Note) For the N values of 1 and 16, the above N+(16-K)/16 division function is
Baud rate =
inhibited. So, be sure to set BR0CR<BR0ADDE> to “0.”
Frequency
TMP19A61 (rev1.0)-13-316
Baud
rated
divided
generator
by the
input
divide
clock
ratio
÷ 16
TMP19A61
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