tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 296
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
Available stocks
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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11.4.5
11.4.6 Quadruple mode
TB0CIN0
TB0CIN1
Two-phase Pulse Input Count Mode (
In this mode, the counter is incremented or decremented by one depending on the state
transition of the two-phase clock that is input through TB0CIN0 and TB0CIN1 and has
phase difference. Interrupt is output in the ups and downs counter mode by the count
operation.
This is a quadruple mode that performs count-up/ down in every modes.
TMRB0C has the same two phase pulse mode as TMRB12. Here we give a detailed
description of TMRB0C.
fs or φT/4
TB0CIN0,TB0CIN1
Count condition
Count up at each edge
0
「
1
¥
1
TMP19A61 (rev 1.0)11-295
2
¥
Fig. 11.4.5.1 Count Circuit of Two-phase Counter
0
1
3
0
0
1
1
0
UP
0
2
3
1
0
1
1
TMRB0C
→
UP
DOWNINT
DOWN
UP
UPINT
2
3
1
0
)
Pin state
Count down at each edge
0
「
1
1
1
0
1
0
1
3
2
3
+1
0
0
DOWN
→
2
1
0
UC0
DOWN
TMP19A61
0
1
1
-1
1
3
2
0
SET
(Read clear)
INT
INT
Internal BUS
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