tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 351

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13.5.2
13.5.3
Mode 1 (7-bit UART Mode)
Mode 2 (8-bit UART Mode)
The 7-bit UART mode can be selected by setting the serial mode control register (SC0MOD
<SM1, 0>) to "01."
In this mode, parity bits can be added to the transmit data stream; the serial mode control
register (SC0CR <PE>) controls the parity enable/disable setting. When <PE> is set to "1"
(enable), either even or odd parity may be selected using the SC0CR <EVEN> bit. The
length of the stop bit can be specified using SC0MOD2<SBLEN>.
The 8-bit UART mode can be selected by setting SC0MOD0 <SM1:0> to "10." In this mode,
parity bits can be added and parity enable/disable is controlled using SC0CR <PE>. If <PE>
= "1" (enabled), either even or odd parity can be selected using SC0CR <EVEN>.
Example:
Example:
(Note) X: don’t care
SC0MOD ← X 0
SC0CR
BR0CR
IMC3
SC0BUF
PCCR
PCFC
are listed in the following table.
are as follows:
* Clock conditions
* Clock conditions
←
←
← X 1 1 X X X 0 0
← 0 0 1 0 1 0 1 0
←
← * * * * * * * *
− − − − − − −
− − − − − − −
−
7 6 5 4 3 2 1 0
1 1
start
−
start
The control register settings for transmitting in the following data format
The control register settings for receiving data in the following format
X 0 1 0 1
−
TMP19A61 (rev1.0)-13-350
bit 0
0 1 0 0
− : no change
bit 0
1
Transmission direction (Transmission rate of 9600 bps
@ fc = 24.576 MHz)
1
1
Transmission direction (Transmission rate of 2400 bps
@ fc = 24.576 MHz)
System clock
High-speed clock gear
Prescaler clock
System clock
High-speed clock gear
Prescaler clock
1
2
2
Sets the 7-bit UART mode.
Adds even parity.
Sets the data rate to 2400 bps.
Enables the INTTX0 interrupt and sets to level 4 by the
<31:24> bits of the 32 bit register.
Sets the data to be sent.
Designates PC0 as the TXD0 pin.
3
3
4
4
5
5
:
:
:
:
:
:
6
High-speed (fc)
1x (fc)
fperiph/4 (fperiph=fsys)
High-speed (fc)
1x (fc)
fperiph/4 (fperiph=fsys)
6
7
parity
even
TMP19A61
parity
odd
stop
stop