tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 365

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14.1.8
14.1.9
Transmit Counter
Transmit Control Unit
TXDCLK
(UART) mode. It is counted by HSIOCLK as in the case of the receive counter and
generates a transmit clock (TXDCLK) on every 16th clock pulse.
SIOCLK
•
•
When the CPU writes data to the transmit buffer, the transmitting of data begins on the
rising edge of the next HTXDCLK and a transmit shift clock (HTXDSFT) is generated.
The transmit counter is a 4-bit binary counter used in the asynchronous communication
In the HSCLK output mode with HSC0CR <IOC> set to "0," each bit of data in the transmit
buffer is output to the HTXD0 pin on the rising edge of the shift clock output from the
HSCLK0 pin.
In the HSCLK input mode with HSC0CR <IOC> set to "1," each bit of data in the transmit
buffer is output to the HTXD0 pin on the rising or falling edge of the input HSCLK signal
according to the HSC0CR <SCLKS> setting.
I/O interface mode:
Asynchronous (UART) mode :
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Fig. 14-5 Transmit Clock Generation
TMP19A61(rev. 1.0) 14-364
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TMP19A61
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