tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 346
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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SCLK0 input
(<SCLKS>=0
rising edge mode)
SCLK0 input
(<SCLKS>=1
falling edge mode)
SCLK0 input
(<SCLKS>=0
rising edge mode)
SCLK0 input
(<SCLKS>=1
falling edge mode)
Receive data
read timing
Receive data
read timing
Receive data
read timing
(INTRX0 interrupt
request)
(INTRX0
request)
(INTRX0
request)
RBFULL
RBFULL
SCLK0 output
RBFULL
OERR
RXD0
(Note) To receive data, SC0MOD <RXE> must always be set to "1" (receive enable)
RXD0
RXD0
<WBUF> = "1" (if double buffering is enabled) (if data cannot be read from buffer 2)
Fig. 13.5.1.3 Receive Operation in the I/O Interface Mode (SCLK0 Output Mode)
Fig. 13.5.1.4 Receive Operation in the I/O Interface Mode (SCLK0 Input Mode)
regardless of the SCLK input or output mode.
interrupt
interrupt
In the SCLK input mode, since receive double buffering is always enabled, the received
frame can be moved to receive buffer 2 and receive buffer 1 can receive the next frame
successively.
The INTRX receive interrupt is generated each time received data is moved to receive
buffer 2.
bit
SCLK input mode
7
If data is read from buffer 2
bit 0
bit 0
bit 0
If data cannot be read from buffer 2
TMP19A61 (rev1.0)-13-345
bit 1
bit 1
bit 1
bit 5
bit 5
bit 6
bit 6
bit 6
bit 7
bit 7
bit 7
TMP19A61
bit 0
bit 0
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