tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 353

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

TMP19A61
13.5.4
Mode 3 (9-bit UART)
The 9-bit UART mode can be selected by setting SC0MOD0 <SM1:0> to "11." In this mode,
parity bits must be disabled (SC0CR <PE> = "0").
The most significant bit (9th bit) is written to bit 7 <TB8> of the serial mode control register 0
(SC0MOD0) for transmit data and it is stored in bit 7 <RB8> of the serial control register
SC0CR upon receiving data. When writing or reading data to/from the buffers, the most
significant bit must be written or read first before writing or reading to/from SC0BUF. The
stop bit length can be specified using SC0MOD2 <SBLEN>.
Wakeup function
In the 9-bit UART mode, slave controllers can be operated in the wake-up mode by setting
the wake-up function control bit SC0MOD0 <WU> to "1." In this case, the interrupt INTRX0
will be generated only when SC0CR <RB8> is set to "1."
TXD
RXD
TXD
RXD
TXD
RXD
TXD
RXD
Master
Slave 1
Slave 2
Slave 3
(Note) The TXD pin of the slave controller must be set to the open drain output mode using the
ODE register.
Fig. 13.5.4.1 Serial Links to Use Wake-up Function
TMP19A61 (rev1.0)-13-352