tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 447

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(0xFFFF_FA01)
WDCR
17.3.2
bit Symbol
Read/Write
After reset
Function
Watchdog Timer Control Register (WDCR)
(Note) Writing the disable code (BIH) clears the binary counter.
Set WDMOD <WDTE> to "1".
This is a register for disabling the watchdog timer function and controlling the clearing
function of the binary counter.
• Disabling control
By writing the disable code (B1H) to this WDCR register after setting WDMOD <WDTE> to
"0," the watchdog timer can be disabled.
• Enable control
• Watchdog timer clearing control
Writing the clear code (4EH) to the WDCR register clears the binary counter and allows it
to resume counting.
WDMOD
WDCR
WDCR
B1H : WDT disable code
4EH : WDT clear code
Others: Invalid
This register is exclusively for writing. Each bit is read as “0”.
7
Fig. 17.3.2.1 Watchdog Timer Control Register
← 0
← 1 0 1 1 0 0 0 1
← 0 1 0 0 1 1 1 0
6
− − − − − − −
TMP19A61
5
(rev1.0)
Clears WDTE to “0”.
Writes the disable code
Writes clear code (4EH).
4
-17-446
⎯
⎯
W
3
Others
B1H
4EH
Disable & clear of WDT
2
Disable code
Clear code
⎯
(B1H).
TMP19A61
1
0