tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 224

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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BMA4
(0xFFFF_E410H)
BMA5
(0xFFFF_E41CH)
(Note) Make sure to write "0" for bits 9 through 15 for BMA4 and BMA5.
The size of both the CS4 and CS5 spaces can be a minimum of 32 KB to a maximum of 2 GB.
The external address space of the TMP19A61 is 16 MB and so bits 9 through 15 must be set
to "0" as addresses A24 through A30 are not masked.
Read/Write
After reset
Function
Read/Write
After reset
Function
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Read/Write
After reset
Function
Read/Write
After reset
Function
Read/Write
After reset
Function
Read/Write
After reset
Function
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
Fig. 9.1.3 Base and Mask Address Setting Registers (BMA4, BMA5)
15
23
15
23
31
31
7
1
0
0
0
7
1
0
0
0
TMP19A61 (rev1.0)-9-223
14
22
30
14
22
30
6
1
0
0
0
6
1
0
0
0
CS4 space size setting 0: Address for comparison
A23 to A16 to be set as a start address
CS5 space size setting 0: Address for comparison
A23 to A16 to be set as a start address
13
21
29
13
21
29
A31 to A24 to be set as a start address
A31 to A24 to be set as a start address
5
1
0
0
0
5
1
0
0
0
Make sure to write “0.”
Make sure to write “0.”
12
20
28
12
20
28
4
1
0
0
0
4
1
0
0
0
MA4
MA4
MA5
MA5
R/W
R/W
BA4
R/W
BA4
R/W
R/W
R/W
BA4
R/W
BA4
R/W
11
19
27
11
19
27
3
1
0
0
0
3
1
0
0
0
2
10
18
10
18
26
26
2
1
0
0
0
1
0
0
0
TMP19A61
17
25
17
25
1
1
9
0
0
0
1
1
9
0
0
0
CS4 space
size setting
0: Address
for
comparison
CS5 space
size setting
0: Address
for
comparison
16
24
16
24
0
1
8
1
0
0
0
1
8
1
0
0

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