tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 573

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

24.17
(Note 1) If the current bus cycle has not terminated due to wait-state insertion, the TMP19A61 does not
(Note 2) This broken line indicates that output buffers are disabled, not that the signals are at indeterminate
AD0~AD15
ALE
A0~A23,
BUSRQ
BUSAK
RD , WR
CS0 ~ CS3 ,
R
Bus Request and Bus Acknowledge Signals
/
W
respond to
states. The pin holds the last logic value present at that pin before the bus is relinquished. This is
dynamically accomplished through external load capacitances. In case of using the external load
capacitance to maintain the bus at a predefined state, the equipment manufacturer needs to
consider the additional time (determined by the CR constant) required for the signal transmission
through the external load capacitances. The on-chip, integrated programmable pullup/pulldown
resistors remain active, depending on internal signal states.
, HWR
Bus float to
Bus float to
Parameter
BUSRQ
BUSAK
BUSAK
fall
rise
low until the wait state ends.
TMP19A61 (rev 1.0)-24-572
(Note 1)
Symbol
t
t
ABA
BAA
t
ABA
Min
0
0
Equation
Max
80
80
(Note 2)
(Note 2)
Min
0
0
54 MHz
Max
80
80
TMP19A61
Unit
ns
ns
t
BAA