tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 532

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

23.2.2 ROM data Protect
ROM data protecting restrict the on-chip RAM from reading out the data.
It also prohibits the Flash from executing commands. When ROM protecting register
ROMSEC1<RSECON> bit is "1", ROM data protecting becomes effective with Flash protected.
The default setting of RSECON bit is “1”.
It never goes into ROM data protecting state unless all the blocks of Flash are not protected. When it
goes in to the Flash protecting state with the entire Flash blocks protected, the ROM data protecting
state is set as the default.
(Note) Under the ROM data protecting condition, only the command in the internal ROM is
If instructions in the ROM area have been replaced with instructions in the RAM area in a PC by
using the ROM correction function, a PC shows the instructions as residing in the flash ROM area.
Because they actually reside in the RAM area, data cannot be read in a ROM protected state. To
read data by using instructions held in the overwritten RAM area, it is necessary to write data to
RAM by using a program available in the ROM area or to use other means.
If the ROM area is put in a protected state, the following operations cannot be performed:
The following operations can be performed even if the ROM area is in a protected state:
Note)Mask is ROM protected as a default.
ROM protection is activated by setting FLCS< BLPRO 3:0> to 1111.
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• Executing the command to unprotect automatic blocking in writer mode, performing the
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accessible to RSECON bit. Please note that the protection releasing program is
needed to be stored in the internal ROM.
taken from the ROM area
(ROMSEC1, ROMSEC2) that concern the protection of the ROM area
flash command sequences other than the automatic blocking unprotect command
sequence, and performing the flash command sequence in single or boot mode by
specifying an address in the ROM area.
ROM area
EJTAG
Using instructions placed in areas other than the ROM area to load or store the data
Store to DMAC register (NMI by the bus error is generated.)
Loading or storing the data taken from the ROM area in accordance with EJTAG
Using BOOT-ROM to load or store the data taken from the ROM area
Executing flash writer to load or store the data taken from the ROM area
Using instructions placed in areas other than the ROM area to access the registers
Using instructions placed in the ROM area to load the data taken from the ROM area
Using instructions placed in all areas to load the data taken from areas other than the
Using instructions placed in all areas to make instructions branch off to the ROM area
Performing PC trace (there are restrictions) or break on the ROM area in accordance with
Data transfer of ROM area by DMAC
TMP19A61 (rev1.0) 23-531
TMP19A61