tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 380

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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(0xFFFF_E80A)
(0xFFFF_E80B)
(0xFFFF_E807)
HSC0RST
HSC0TST
HSC0EN
<SIOE>: It specifies HSIO operation. When HSIO operation is disabled, the clock will not be supplied
(Note) The registers must be byte accessed in setting them.
to the HSIO module except for the register part and thus power consumption can be reduced
(other registers cannot be accessed for read/write operation). When HSIO is to be used, be
sure to enable HSIO by setting "1" to this register before setting any other registers of the
HSIO module. If HSIO is enabled once and then disabled, all the register settings are
maintained.
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Function
Function
RX FIFO
Overrun
1: Generated
TX FIFO
Under run
1: Generated
Cleared
when
read
Cleared
by writing
to FIFO
Always reads "0."
ROR
TUR
R
R
7
7
7
0
1
Fig. 14-19 Transmit FIFO Status Register
0
-
Fig. 14-18 Receive FIFO Status Register
Fig. 14-20 HSIO Enable Register
Always reads "0."
Always reads "0."
TMP19A61(rev 1.0)14-379
6
6
6
0
0
0
-
-
-
5
5
5
0
0
0
-
-
-
4
4
4
R
0
0
-
-
-
3
R
3
R
3
0
0
0
-
-
-
Status of RX FIFO fill level
000: Empty
001: 1Byte
010: 2Bytes
011: 3Bytes
Status of TX FIFO fill level
000: Empty
001: 1Byte
010: 2Bytes
011: 3Byte s
100: 4Bytes
100: 4Bytes
RLVL2
TLVL2
2
2
2
0
0
0
-
TMP19A61
RLVL1
TLVL1
1
1
1
0
0
0
-
HSIO
operation
0: Disable
1: Enable
RLVL0
TLVL0
SIOE
R/W
0
0
0
0
0
0

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