tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 432
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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ADAREGSPL
(0xFFFF_F810)
ADAREGSPH
(0xFFFF_F811)
•
•
•
•
value is stored. A read of a lower register (ADAREGSPL) will set this bit to "0."
conversion result storage registers (ADAREGxH,ADAREGxL) are read. A read of a flag will clear this bit to "0."
Converted channel x value
Values read from bits 5 through 2 of ADAREGSPL are always "1."
Bit 0 of ADAREGSPL is the A/D conversion result storage flag <ADRxRF>. It is set to "1" after an A/D converted
Bit 1 of ADAREGSPL is the over RUN flag <OVRx>. It is set to "1" if a conversion result is overwritten before both
When reading conversion result storage registers, first read upper registers and then read lower registers.
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
Function
Function
ADRSP1
A/D conversion result
ADRSP9
Store lower 2 bits of
7
7
Lower A/D Conversion Result Register SP
Upper A/D Conversion Result Register SP
ADREGxH
R
0
9
ADRSP0
ADRSP8
7
TMP19A61 (rev1.0)16-431
6
6
8
6
7
5
"1" is read.
ADRSP7
4
Store upper 8 bits of A/D conversion result
6
5
5
3
5
2
ADRSP6
4
1
4
4
3
0
R
R
1
0
2
ADRSP5
1
7
3
3
6
0
5
ADRSP4
2
2
4
TMP19A61
3
Over RUN
0: Not
1: Generate
ADRSP3
OVRSP
2
flag
generate
R
1
0
1
ADREGxL
1
0
A/D
conversion
result storage
flag
1: Presence
ADRSPRF
ADRSP2
of
conversion
result
0
R
0
0
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