tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 526

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Read
Read/reset
ID-Read
Automatic
programming
(note)
Automatic
erase
Auto
Block erase (note)
Protection bit
programming
Protection bit
erase
<Flash chip 0 & 1 command sequence: Addr.[19]=0 or 1>
Command
sequence
(Note 1) Always set "0" to the address bits [1:0] in the entire bus cycle. (Setting values to bits [7:2]
(Note 2) Bus cycles are "bus write cycles" except for the second bus cycle of the Read command,
(Note 3) In executing the bus write cycles, the interval between each bus write cycle shall be 15
(Note 4) The "Sync command" must be executed immediately after completing each bus write cycle.
(Note 5) Execute the "Sync command" immediately following the "LW command" after the fourth
(3) List of Command Sequences
Note) Select chip 0 or chip 1 with Addr[19].
Protection bit programming and protection bit erase are only available with chip 0.
page
(4) Supplementary explanation
chip
bus write cycle of the ID-Read command.
are undefined.)
the fourth bus cycle of the Read/reset command, and the fifth bus cycle of the ID-Read
command. Bus write cycles are executed by SW commands. Use "Data" in the table for the
store data of SW commands. The address [31:16] in each bus write cycle should be the
target flash memory address [31:16] of the command sequence. Use "Addr." in the table for
the address [15:0].
system clocks or more.
• RA:
• RD:
• IA:
• ID:
• PA:
• BA: Block address
• PBA: Protection bit address
PD:
First bus
0x55XX
0x55XX
0x55XX
0x55XX
0x55XX
0x55XX
0x55XX
After the fourth bus cycle, enter data in the order of the address for a page.
cycle
Addr.
Data
0xXX
0xAA
0xAA
0xAA
0xAA
0xAA
0xAA
0xAA
0xF0
Read address
Read data
ID address
ID data
Program page address
Program data (32-bit data)
Second bus
Table 22.7 Flash Memory Access from the Internal CPU
0xAAXX
0xAAXX
0xAAXX
0xAAXX
0xAAXX
0xAAXX
0xAAXX
cycle
Addr.
Data
0x55
0x55
0x55
0x55
0x55
0x55
0x55
TMP19A61 (rev1.0) 22-525
Third bus
0x55XX
0x55XX
0x55XX
0x55XX
0x55XX
0x55XX
0x55XX
Addr.
cycle
Data
0xF0
0xA0
0x9A
0x6A
0x90
0x80
0x80
Fourth bus
0x55XX
0x55XX
0x55XX
0x55XX
Addr.
cycle
Data
0xAA
0xAA
0xAA
0xAA
0x00
PD0
PA
IA
RD
RA
Fifth bus
0xAAXX
0xAAXX
0xAAXX
0xAAXX
cycle
Addr.
Data
0xXX
0x55
0x55
0x55
0x55
PD1
PA
ID
RA
RD
Sixth bus
TMP19A61
0x55XX
0x55XX
0x55XX
cycle
Addr.
Data
0x10
0x30
0x9A
0x6A
PD2
PA
BA
Seventh bus
cycle
Addr.
Data
0x9A
0x6A
PBA
PBA
PD3
PA

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