tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 226

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

•
In the base address (BA2), specify "0x1FD0" that corresponds to higher 16 bits of a start
address, while in the mask address (MA2), specify whether a comparison of addresses in the
space A30 through A15 is to be made or not. Set bits 15 to 5 of the mask address (MA2) to
"0." in order for comparison of A31 to be made definitely and to ensure a comparison of A30
through A20. A comparison of A31 is always executed.
This setting allows A31 through A20 to be compared with the value specified as a start address.
As A19 through A0 are masked, a space of 1 MB from 0x1FD0_0000∼0x1FDF_FFFF is
designated as a CS2 space.
After a reset, the CS0, CS1, and CS2 through CS5 spaces are disabled.
To specify a space of 1 MB starting at 0x1FD0_0000 in the CS2 space, the base and mask
address registers must be programmed as shown below.
31
0 0 0 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
1
Values to be set in the base and mask address registers (BMA2)
F
BA2
TMP19A61 (rev1.0)-9-225
D
0
1615
0
0
MA2
TMP19A61
1
F
0