tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 493
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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substrate
Input to
Input from
substrate
21.3.2 Bypass Register
JTDI
The bypass register has a one-bit width. If the TAP controller is in the Shift-DR state (bypass
state), data at the TDI pin is shifted into the bypass register, and the output from the bypass
register is shifted out to the TDO output pin.
Simply put, the bypass register is a circuit for bypassing the devices in a serial boundary scan
chain connected to the substrates that are not required for a test to be conducted. Fig. 21.5
shows the logical position of the bypass register in a boundary scan chain.
If the bypass register is used, the speed of access to boundary scan registers in an active IC in
a data path used for substrate level testing can be increased.
Fig. 21.4 Direction of a Shift of the Instruction Code to the Instruction Register
IC package
The instruction code is shifted from the least significant bit to the instruction register.
TDI
JTDO
Substrate
JTDO
JTDI
Most significant
Fig. 21.5 Function of the Bypass Register
JTDO
JTDI
TMP19A61 (rev1.0)21-492
JTDO
JTDI
JTDI
JTDO
Least significant
Pad cell of boundary scan register
TMP19A61
Bypass
register
TDO
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