tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 450
tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
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20 000
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ADDREGn registers and RAM areas assigned to them are as follows:
(Note 1): The instruction affected by ROM correction under ROM protection is activated
by RAM. Therefore, the instruction corrected by ROM can specify neither conditions of
the ROM reading nor the DMAC. To enable all the instructions, the ROM must be
unprotected.
(Note 2) ROM correction to ROM area ignores the upper address specified by an address
register and decodes the address [19:5].
ADDREG0
ADDREG1
ADDREG2
ADDREG3
ADDREG4
ADDREG5
ADDREG6
ADDREG7
ADDREG8
ADDREG9
ADDREGA
ADDREGB
Register
TMP19A61 (rev1.0)-18-449
0xFFFF_DE80
0xFFFF_DE9F
0xFFFF_DEA0
0xFFFF_DEBF
0xFFFF_DEC0
0xFFFF_DEDF
0xFFFF_DEE0
0xFFFF_DEFF
0xFFFF_DF00
0xFFFF_DF1F
0xFFFF_DF20
0xFFFF_DF3F
0xFFFF_DF40
0xFFFF_DF5F
0xFFFF_DF60
0xFFFF_DF7F
0xFFFF_DF80
0xFFFF_DF9F
0xFFFF_DFA0
0xFFFF_DFBF
0xFFFF_DFC0
0xFFFF_DFDF
0xFFFF_DFE0
0xFFFF_DFFF
ADDREGn and
RAM area
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-
-
-
-
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of words
Number
8
8
8
8
8
8
8
8
8
8
8
8
TMP19A61
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