tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 57

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

(Note) In interrupt initialization, set INTC registers before enabling interrupts with the CP0 register.
（1） Interrupts from external pins INT0~INTB
（2） Other hardware interrupts
・An example setting when an external interrupt "INT3" is used to clear Stop by the falling edge:
Status<IE> =”0”
PMCR<PM3C> =”0”
PMFC<PM3F> =”0”
IMCGA<EMCG32:30> =”010”
IMCGA<INT3EN> =”1”
EICRCG<ICRCG3:0> =”0011”
IMC1<EIM41:40> =”01”
INTCLR<EICLR7:0> =”010”
IMC1<IL42:40> =”101”
ILEV<MLEV>/<CMASK> =”1”/”xxx”
SYNC instruction
Status<IE> =”1”
・An example setting when an external interrupt "INT3" is to be disabled:
Status<IE> =”0”
IMC1<IL42:40> =”000”
INTCLR<EICLR7:0> =”010”
Similarly, if interrupt is to be disabled, first disable interrupt by the CP0 register and then
set INTC.
・ Use PORT PxCR and PxIE to enable an input port. (Refer to 7. Port Function)
・ Use PORT PxFC to set pin functions to INT0 - INTB. (Refer to 7. Port Function)
・ Use PORT PxPUP to set pull-up connections as appropriate. (Refer to 7. Port Function)
・ Use INTC IMCx <EIMxx> to set active state. (Refer to 5.3.3 Interrupt-related Registers)
・ Use IMCGx <EMCGxx> of CG for setting to enable/disable clearing of standby modes.
・ Use INTC IMCx <EIMxx> to set active state of internal interrupt signals to be notified
・ Settings are made to use peripheral hardware devices.
・ Set INTC IMCxx <EIMxx> (refer to 6.9.4 Registers).
(Refer to INTCG Registers, Interrupts to Clear STOP and IDLE)
from CG. If rising or falling edge is set with INTC IMCx <EIMxx>, set it to falling edge (set
IMCx <EIMxx> to "10"). For H/L level setting, set it to "L" level (set IMCx <EIMxx> to "00".
Refer to 6.9.4. Registers).
TMP19A61(rev1.0)-6-56
; Interrupt is disabled
; The port is set to an input port
; The port is assigned to INT3
; INT3 is set to falling edge
; INT3 is set to clear Standby mode
; Clears the INT3 standby clear request
; INT3 is set to level detection
; Clears the INT3 interrupt request
; Interrupt level of INT3 is set to "5."
; Mask level is set to "xxx."
(To be set simultaneously with ILEV <MLEV>)
; Stall until interrupt settings are enabled.
; Interrupt is enabled
; Interrupt is disabled.
; INT3 interrupt is disabled.
; Clears the INT3 interrupt request.
TMP19A61