tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 300
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tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
TOSHIBA/东芝
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20 000
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TMP19A61
12.2
Description for Operations of Each Circuit
12.2.1 Prescaler
The prescaler is provided to acquire the TMRC source clock. The prescaler input clock φT0 is
fperiph/2, fperiph/4, fperiph/8 or fperiph/16 selected by SYSCR0<PRCK1: 0> in the CG. φT2
through φT256 generated by dividing φT0 are available as TMRC prescaler input clocks and can
be selected with TBTACR<TBTCLK3:0>.
Fperiph is either "fgear" which is a clock selected by SYSCR1<FPSEL> in the CG, or "fc" which is
a clock before it is divided by the clock gear.
The operation or stoppage of the prescaler is set with TBTARUN<TBTPRUN> where writing "1"
starts counting and writing "0" clears and stops counting. Table 12.1 shows the prescaler output
clock resolutions.
TMP19A61 (rev1.0)-12-299
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