NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 87

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signal Description
Table 29.
Intel
®
ICH8 Family Datasheet
Power and Ground Signals (Sheet 2 of 2)
VccLAN1_05
VccGLANPLL
VccSATAPLL
(Mobile Only)
VccLAN3_3
VccSusHDA
VccUSBPLL
VccDMIPLL
V_CPU_IO
VSS_NTSC
VccCL1_5
VccCL3_3
VccHDA
VccRTC
Name
Vss
1.5V supply for Controller Link. This plane must be on in S0 and other times
Controller Link is used.
This voltage is generated internally (see
and these pins can be left as NC unless decoupling is required.
3.3V supply for Controller Link. This is a separate power plane that may or may
not be powered in S3–S5 states. This plane must be on in S0 and other times
Controller Link is used.
NOTE: VccCL3_3 must always be powered when VccLAN3_3 is powered.
3.3 V supply for LAN Connect interface buffers. This is a separate power plane
that may or may not be powered in S3–S5 states.
NOTE: VccLAN3_3 must always be powered when VccCL3_3 or Vcc3_3 is
1.05 V supply for LAN controller logic. This is a separate power plane that may
or may not be powered in S3–S5 states.
This voltage is generated internally (see
and these pins can be left as NC unless decoupling is required..
Suspend supply for Intel High Definition Audio. This pin can be either 1.5 or 3.3
V. This power is not expected to be shut off unless the system is unplugged in
desktop configurations or the main battery is removed or completely drained
and AC power is not available in mobile configurations.
Core supply for Intel High Definition Audio. This pin can be either 1.5 or 3.3 V.
This power may be shut off in S3, S4, S5 or G3 states.
3.3 V (can drop to 2.0 V min. in G3 state) supply for the RTC well. This power
is not expected to be shut off unless the RTC battery is removed or completely
drained.
Note: Implementations should not attempt to clear CMOS by using a jumper to
pull VccRTC low. Clearing CMOS in an Intel
by using a jumper on RTCRST# or GPI.
1.5 V supply for core well logic. This signal is used for the USB PLL. This power
may be shut off in S3, S4, S5 or G3 states. Must be powered even if USB not
used.
1.5 V supply for core well logic. This signal is used for the DMI PLL. This power
may be shut off in S3, S4, S5 or G3 states.
1.5 V supply for core well logic. This signal is used for the SATA PLL. This power
may be shut off in S3, S4, S5 or G3 states. Must be powered even if SATA is
not used.
1.5V supply for core will logic. This signal is used for the integrated Gigabit LAN
PLL. This power is shut off in S3, S4, S5 and G3 states.
Powered by the same supply as the processor I/O voltage. This supply is used
to drive the processor interface signals listed in
Grounds.
Not critical to function; balls are for improved package Reliability. These signals
are connected to GND on the chipset package, and can be connected to GND or
left as NC on the platform (can be left as test points).
NOTE: There is no functional impact if these signals are grounded.
powered.
Description
Section 2.26.1
Section 2.26.1
®
ICH8-based platform can be done
Table
17.
for strapping option).
for strapping option).
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