NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 386

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.8.1.7
386
BM_BREAK_EN Register (PM—D31:F0) (Mobile Only)
Offset Address: ABh
Default Value:
Lockable:
Power Well:
4:3
Bit
7
6
5
2
1
0
IDE_BREAK_EN — R/W.
0 = Parallel IDE or Serial ATA traffic will not act as a break event.
1 = Parallel IDE or Serial ATA traffic acts as a break event, even if the BM_STS-
PCIE_BREAK_EN — R/W.
0 = PCI Express* traffic will not act as a break event.
1 = PCI Express traffic acts as a break event, even if the BM_STS-ZERO_EN and
PCI_BREAK_EN — R/W.
0 = PCI traffic will not act as a break event.
1 = PCI traffic acts as a break event, even if the BM_STS-ZERO_EN and POPUP_EN bits
Reserved
EHCI_BREAK_EN — R/W.
0 = EHCI traffic will not act as a break event.
1 = EHCI traffic acts as a break event, even if the BM_STS-ZERO_EN and POPUP_EN
UHCI_BREAK_EN — R/W.
0 = UHCI traffic will not act as a break event.
1 = USB traffic from any of the internal UHCIs acts as a break event, even if the
AZ_BREAK_EN — R/W.
0 = Intel
1 = Intel High Definition Audio traffic acts as a break event, even if the BM_STS-
ZERO_EN and POPUP_EN bits are set. Parallel IDE or Serial ATA master activity will
cause BM_STS to be set and will cause a break from C3/C4.
POPUP_EN bits are set. PCI Express master activity will cause BM_STS to be set
and will cause a break from C3/C4.
are set. PCI master activity will cause BM_STS to be set and will cause a break
from C3/C4.
bits are set. EHCI master activity will cause BM_STS to be set and will cause a
break from C3/C4.
BM_STS-ZERO_EN and POPUP_EN bits are set. UHCI master activity will cause
BM_STS to be set and will cause a break from C3/C4.
ZERO_EN and POPUP_EN bits are set.
Intel High Definition Audio master activity will cause BM_STS to be set and will
cause a break from C3/C4.
®
00h
No
Core
High Definition Audio traffic will not act as a break event.
Description
Attribute:
Size:
Usage:
LPC Interface Bridge Registers (D31:F0)
R/W
8-bit
ACPI, Legacy
Intel
®
ICH8 Family Datasheet