NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 146

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.9
5.9.1
5.9.2
Table 53.
146
Advanced Programmable Interrupt Controller
(APIC) (D31:F0)
In addition to the standard ISA-compatible PIC described in the previous chapter, the
ICH8 incorporates the APIC. While the standard interrupt controller is intended for use
in a uni-processor system, APIC can be used in either a uni-processor or multi-
processor system.
Interrupt Handling
The I/O APIC handles interrupts very differently than the 8259. Briefly, these
differences are:
Interrupt Mapping
The I/O APIC within the ICH8 supports 24 APIC interrupts. Each interrupt has its own
unique vector assigned by software. The interrupt vectors are mapped as follows, and
match “Config 6” of the Multi-Processor Specification.
APIC Interrupt Mapping (Sheet 1 of 2)
IRQ #
• Method of Interrupt Transmission. The I/O APIC transmits interrupts through
• Interrupt Priority. The priority of interrupts in the I/O APIC is independent of the
• More Interrupts. The I/O APIC in the ICH8 supports a total of 24 interrupts.
• Multiple Interrupt Controllers. The I/O APIC architecture allows for multiple I/O
10
11
12
13
14
0
1
2
3
4
5
6
7
8
9
memory writes on the normal datapath to the processor, and interrupts are handled
without the need for the processor to run an interrupt acknowledge cycle.
interrupt number. For example, interrupt 10 can be given a higher priority than
interrupt 3.
APIC devices in the system with their own interrupt vectors.
SERIRQ
Via
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
from Pin
Direct
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
1
Message
Via PCI
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Cascade from 8259 #1
8254 Counter 0, HPET #0 (legacy mode)
RTC, HPET #1 (legacy mode)
Option for SCI, TCO
Option for SCI, TCO
HPET #2, Option for SCI, TCO
FERR# logic
Mobile Only: IDEIRQ (legacy mode, non-
combined or combined mapped as primary),
SATA Primary (legacy mode)
Internal Modules
Intel
®
Functional Description
ICH8 Family Datasheet