NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 836
NH82801HBM S LB9A
Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet
1.NH82801HBM_S_LB9A.pdf
(890 pages)
Specifications of NH82801HBM S LB9A
Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 159.
Table 160.
836
IDE Multiword DMA Timings (Mobile Only)
Ultra ATA Timing (Mode 0, Mode 1, Mode 2) (Sheet 1 of 3) (Mobile Only)
Sym
t83a
t83b
t84a
t70kw
t80
t81
t82
t70kr
t70lw
t70m
Sym
t70lr
t70d
t70e
t70g
t70h
t70n
t70z
t70f
t70i
t70j
t70
Cycle Time (Tcyc)
Two Cycle Time (T2cyc)
Data Hold Time (Tdh)
Sustained Cycle Time
(T2cyctyp)
Data Setup Time (Tds)
Recipient IC data setup
time (from data valid until
STROBE edge) (see Note
2) (Tdsic)
DIOR# negated pulse width (min)
DIOW# to DDREQ delay (max)
Cycle Time (min)
DIOR#/DIOW# (min)
DIOR# Data access (max)
DIOR# Data hold (min)
DIOR#/DIOW# Data setup (min)
DIOW# Data hold (min)
DDACK# to DIOR#/DIOW# setup
(min)
DIOR#/DIOW# to DDACK# hold (min)
DIOW# negated pulse width (min)
DIOR# to DDREQ delay (max)
DCS1#/DCS3# valid to DIOR#/DIOW#
(min)
DCS1#/DCS3# hold (min)
DDACK# to tristate (max)
Parameter (1)
Parameter
Min
112
230
14.
15
Mode 0
7
5
(ns)
240
Max
—
—
—
—
—
Min
153
9.7
73
10
Mode 1
5
Mode 0
(ns)
160
(nS)
480
215
150
100
215
120
20
20
50
40
50
15
20
Max
5
0
—
—
—
—
—
Min
115
6.8
54
Mode 2
7
5
Mode 1
(ns)
(nS)
120
150
80
60
30
15
50
50
40
40
30
10
25
5
0
5
Max
—
—
—
—
—
Intel
Electrical Characteristics
Measuring
®
Mode 2
Connector
Connector
Connector
Connector
Connector
Location
ICH8 ball
Recipient
Recipient
Recipient
(nS)
ICH8 Family Datasheet
Sender
Sender
120
70
50
20
10
25
25
35
35
25
10
25
5
0
5
End
Figure
Figure
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