NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 330

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.1.15
9.1.16
330
GC—GPIO Control Register (LPC I/F — D31:F0)
Offset Address: 4Ch
Default Value:
PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control Register
(LPC I/F—D31:F0)
Offset Address: PIRQA
Default Value:
Lockable:
7:5
3:0
Bit
6:4
3:0
4
Bit
7
Reserved.
GPIO Enable (EN) — R/W. This bit enables/disables decode of the I/O range pointed
to by the GPIO Base Address register (D31:F0:48h) and enables the GPIO function.
0 = Disable.
1 = Enable.
Reserved.
Interrupt Routing Enable (IRQEN) — R/W.
0 = The corresponding PIRQ is routed to one of the ISA-compatible interrupts
1 = The PIRQ is not routed to the 8259.
NOTE: BIOS must program this bit to 0 during POST for any of the PIRQs that are
Reserved
IRQ Routing — R/W. (ISA compatible.)
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
Value
specified in bits[3:0].
being used. The value of this bit may subsequently be changed by the OS
when setting up for I/O APIC interrupt delivery mode.
00h
PIRQC
80h
No
Reserved
Reserved
Reserved
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ
–
–
60h, PIRQB
62h, PIRQD
–
–
Value
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
61h, Attribute:
63h
Description
Description
Attribute:
Size:
Size:
Power Well:
Reserved
IRQ9
IRQ10
IRQ11
IRQ12
Reserved
IRQ14
IRQ15
IRQ
LPC Interface Bridge Registers (D31:F0)
R/W
8 bit
R/W
8 bit
Core
Intel
®
ICH8 Family Datasheet