NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 282

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.1.40
7.1.41
282
RPC—Root Port Configuration Register
Offset Address: 0224–0227h
Default Value:
DMIC—DMI Control Register
Offset Address: 0234–0237h
Default Value:
31:8
31:2
6:4
1:0
1:0
Bit
Bit
7
3
2
Reserved
High Priority Port Enable (HPE) — R/W.
0 = The high priority path is not enabled.
1 = The port selected by the HPP field in this register is enabled for high priority. It
High Priority Port (HPP) — R/W. This controls which port is enabled for high
priority when the HPE bit in this register is set.
111 = Reserved
110 = Reserved
101 = Port 6
100 = Port 5
101 = Port 4
010 = Port 3
001 = Port 2
000 = Port 1
Reserved
Port Configuration2 (PC2) — RO. This controls how the PCI bridges are organized
in various modes of operation for Ports 5 and 6.
1 = Reserved
0 = 2 x1s, Port 5 (x1), Port 6 (x1)
This bit is in the resume well and is only reset by RSMRST#.
Port Configuration (PC) — RO. This field controls how the PCI bridges are
organized in various modes of operation for Ports 1–4. For the following mappings, if
a port is not shown, it is considered a x1 port with no connection.
These bits represent the strap values of HDA_SDOUT (bit 1) and HDA_SYNC (bit 0)
when TP[3] is not pulled low at the rising edge of PWROK.
11 = 1 x4, Port 1 (x4)
10 = Reserved
01 = 1 x2 & 2 x1s, Port 1 (x2), Port 3 (x1), Port 4 (x1)
00 = 4 x1s, Port 1 (x1), Port 2 (x1), Port 3 (x1), Port 4 (x1)
These bits live in the resume well and are only reset by RSMRST#.
Reserved
DMI Clock Gate Enable (DMICGEN) — R/W. BIOS must program this field to 00b
(desktop) or 11b (mobile only)
will be arbitrated above all other VC0 (including integrated VC0) devices.
0000000yh (y = 00xxb)
00000000h
Description
Description
Attribute:
Size:
Attribute:
Size:
Chipset Configuration Registers
R/W, RO
32-bit
R/W, RO
32-bit
Intel
®
ICH8 Family Datasheet