NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 652

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NH82801HBM S LB9A

Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet

Specifications of NH82801HBM S LB9A

Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.1.20
17.1.21
652
TCSEL—Traffic Class Select Register
(Intel
Address Offset: 44h
Default Value:
This register assigned the value to be placed in the TC field. CORB and RIRB data will
always be assigned TC0.
DCKCTL—Docking Control Register
(Intel
Only)
Address Offset: 4Ch
Default Value:
7:3
2:0
7:1
Bit
Bit
0
Reserved.
Intel
register assigns the value to be placed in the Traffic Class field for input data, output
data, and buffer descriptor transactions.
000 = TC0
001 = TC1
010 = TC2
011 = TC3
100 = TC4
101 = TC5
110 = TC6
111 = TC7
NOTE: These bits are not reset on D3
Reserved.
Dock Attach (DA) — R/W / RO. Software writes a 1 to this bit to initiate the docking
sequence on the HDA_DOCK_EN# and HDA_DOCK_RST# signals. When the docking
sequence is complete hardware will set the Dock Mated (GSTS.DM) status bit to 1.
Software writes a 0 to this bit to initiate the undocking sequence on the
HDA_DOCK_EN# and HDA_DOCK_RST# signals. When the undocking sequence is
complete hardware will set the Dock Mated (GSTS.DM) status bit to 0.
Note that software must check the state of the Dock Mated (GSTS.DM) bit prior to
writing to the Dock Attach bit. Software shall only change the DA bit from 0 to 1 when
DM=0. Likewise, software shall only change the DA bit from 1 to 0 when DM=1. If
these rules are violated, the results are undefined.
Note that this bit is Read Only when the DCKSTS.DS bit = 0.
®
®
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0) (Mobile
®
PLTRST#.
HIgh Definition Audio Traffic Class Assignment (TCSEL)— R/W. This
00h
00h
Intel
®
Description
Description
HOT
High Definition Audio Controller Registers (D27:F0)
Attribute:
Size:
Attribute:
Size:
to D0 transition; however, they are reset by
R/W
8 bits
R/W, RO
8 bits
Intel
®
ICH8 Family Datasheet

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