NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 245

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Functional Description
5.23.1.2
5.23.1.3
5.23.1.4
5.23.1.5
Intel
®
ICH8 Family Datasheet
Flash Access
There are two types of flash accesses:
Direct Access:
Program Register Access:
Program Register Software Sequencing
Direct Access Security
Register Access Security
• Masters are allowed to do direct read only of their primary region
• Master's Host or ME virtual read address is converted into the SPI Flash Linear
• Program Register Accesses are not allowed to cross a 4KB boundary and can not
• Software programs the FLA corresponding to the region desired
• Supported in Descriptor and Non-Descriptor Mode
• Software has full control over the SPI op codes and transactions
• Primary use of software sequencing is when using non-standard instructions and as
• "Requester ID of the device must match that of the primary Requester ID in the
• "Calculated Flash Linear Address must fall between primary region base/limit
• "Direct Write not allowed
• "Direct Read Cache contents are reset to 0's on a read from a different master
• Only primary region masters can access the registers
• Masters are only allowed to read or write those regions they have read/write
• Using the Flash Region Access Permissions, one master can give another master
• Using the five Protected Range registers, each master can add separate read/write
Address (FLA) using the Flash Descriptor Region Base/Limit registers
issue a command that might extend across two componen ts
a backup to hardware sequencing.
Master Section
Note: Processor running GbE software can access GbE registers
permission
read/write permissions to their area
protection above that granted in the Flash Descriptor for their own accesses
— GbE region can only be directly accessed by the GbE controller. GbE software
— Software must read the devices Pri mary Region Base/Limit address to create a
— Same behavior as ICH7
— Additional registers such as SPI Cycle Frequency and Fast Read have been
— Supports the same cache flush mechanism in ICH7 which includes Program
— Example: BIOS may want to protect different regions of BIOS from being
— Ranges can extend across region boundaries
must use Program Registers to access the GbE region.
FLA.
added in ICH8
Register Writes
erased
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