NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 321

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Gigabit LAN Configuration Registers
8.2
8.2.1
8.2.2
8.2.3
Intel
®
ICH8 Family Datasheet
GBAR0—Gigabit LAN Base Address Register 0
Registers
LDCR1—LAN Device Control Register 1
(Gigabit LAN Memory Mapped Base Address Register)
Address Offset: GBAR0 + 00h
Default Value:
LDCR2—LAN Device Control Register 2
(Gigabit LAN Memory Mapped Base Address Register)
Address Offset: GBAR0 + 18h
Default Value:
LDR1—LAN Device Initialization Register 1
(Gigabit LAN Memory Mapped Base Address Register)
Address Offset: GBAR0 + 20h
Default Value:
31:25
31:21
23:0
19:0
31:0
Bit
Bit
Bit
24
20
Reserved
PLCD Power Down (PLCDPD) — R/W. When the bit is cleared to '0', the PLCD power
down setting is controlled by the internal logic of the LAN controller. When set to '1' and
the LDCR.LPPDE is set as well, the LAN controller sets the external PLCD to power down
mode.
Further, if the LAN PHY Power Control functionality is implemented, the LAN controller
disconnects the LCD power supply (mobile only - see
Reserved
Reserved
LAN PHY Power Down Enable (LPPDE) — R/W. When set, enables the PHY to enter
a low-power state when the LAN controller is at the Moff / D3 no WoL.
This bit is loaded from word 13h in the NVM
Reserved
LDR1 Field 1 — R/W.
00100201h
001000000h
1000xxxxh
Description
Description
Description
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
Section
R/W, RO
32 bits
R/W, RO
32 bits
R/W, RO
32 bits
5.3.6).
321