NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 240

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.21.1.3
5.21.1.4
5.21.1.4.1
240
Cold Boot/Resume from S3 When Docked
Undock Sequence
There are two possible undocking scenarios. The first is the one that is initiated by the
user that invokes software and gracefully shuts down the dock codecs before they are
undocked. The second is referred to as the “surprise undock” where the user undocks
while the dock codec is running. Both of these situations appear the same to the
controller as it is not cognizant of the “surprise removal”. But both sequences will be
discussed here.
Normal Undock
1. When booting and resuming from S3, PLTRST# switches from asserted to de-
2. POST BIOS detects that the dock is attached and sets the DCKCTL.DA bit to 1. Note
3. The Bus Driver clears the STATESTS bits, then de-asserts CRST#, waits
4. When CRST# is de-asserted, the dock state machine detects that DCKCTL.DA is
5. The Bus Driver enumerates the codecs present as indicated via the STATESTS bits.
1. In the docked quiescent state, the Dock Attach (DCKCTL.DA) bit and the Dock Mate
2. The user initiates an undock event through the GUI interface or by pushing a
3. ACPI BIOS will call the HD Audio Bus Driver software in order to halt the stream to
4. The ACPI BIOS initiates the hardware undocking sequence by writing a 0 to the
5. The HD Audio controller asserts HDA_DOCK_RST#. HDA_DOCK_RST# assertion
6. A minimum of 4 BCLKs after HDA_DOCK_RST# the controller will de-assert
7. After this hardware undocking sequence is complete, the controller hardware clears
asserted. This clears the DCKCTL.DA bit and the dock state machines. Because the
dock state machines are reset, the dock is electrically isolated (HDA_DOCK_EN#
de-asserted) and DOCK_RST# is asserted.
that at this point CRST# is still asserted so the dock state machine will remain in
it's reset state.
approximately 7ms, then checks the STATESTS bits to see which codecs are
present.
still set and the controller hardware sequences through steps to electrically connect
the dock by asserting HDA_DOCK_EN# and then eventually de-asserts
DOCK_RST#. This completes within the 7ms mentioned in step 3).
(DCKSTS.DM) bit are both asserted. The HDA_DOCK_EN# signal is asserted and
HDA_DOCK_RST# is de-asserted.
button. This mechanism is outside the scope of this section of the document. Either
way ACPI BIOS software will be invoked to manage the undock process.
the dock codec(s) prior to electrical undocking. If the HD Audio Bus Driver is not
capable of halting the stream to the docked codec, ACPI BIOS will initiate the
hardware undocking sequence as described in the next step while the dock stream
is still running. From this standpoint, the result is similar to the “surprise undock”
scenario where an audio glitch may occur to the docked codec(s) during the undock
process.
DCKCTL.DA bit.
shall be synchronous to BCLK. There are no other timing requirements for
HDA_DOCK_RST# assertion. Note that the HD Audio link reset specification
requirement that the last Frame sync be skipped will not be met.
HDA_DOCK_EN# to isolate the dock codec signals from the ICH8 HD Audio link
signals. HDA_DOCK_EN# is de-asserted synchronously to BCLK and timed such
that BCLK, SYNC, and SDO are low.
the DCKSTS.DM bit to 0 indicating that the dock is now un-mated. ACPI BIOS
software polls DCKSTS.DM and when it sees DM set, conveys to the end user that
physical undocking can proceed. The controller is now ready for a subsequent
docking event.
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Functional Description
ICH8 Family Datasheet