NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 641

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SMBus Controller Registers (D31:F3)
16.2.18
Note:
16.2.19
Note:
Intel
®
ICH8 Family Datasheet
NOTIFY_DLOW—Notify Data Low Byte Register
(SMBUS—D31:F3)
Register Offset: SMBASE + 16h
Default Value:
This register is in the resume well and is reset by RSMRST#.
NOTIFY_DHIGH—Notify Data High Byte Register
(SMBUS—D31:F3)
Register Offset: SMBASE + 17h
Default Value:
This register is in the resume well and is reset by RSMRST#.
7:0
7:0
Bit
Bit
DATA_HIGH_BYTE — RO. This field contains the second (high) byte of data received
during the Host Notify protocol of the SMBus 2.0 specification. Software should only
consider this field valid when the HOST_NOTIFY_STS bit (D31:F3:SMBASE +10, bit 0)
is set to 1.
DATA_LOW_BYTE — RO. This field contains the first (low) byte of data received
during the Host Notify protocol of the SMBus 2.0 specification. Software should only
consider this field valid when the HOST_NOTIFY_STS bit (D31:F3:SMBASE +10, bit 0)
is set to 1.
00h
00h
Description
§ §
Description
Attribute:
Size:
Attribute:
Size:
RO
8 bits
RO
8 bits
641