NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 203

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NH82801HBM S LB9A

Manufacturer Part Number
NH82801HBM S LB9A
Description
CONTROLLER HUB, ICH8M, I/O, 82801HBM
Manufacturer
Intel
Datasheet

Specifications of NH82801HBM S LB9A

Power Dissipation Pd
2.4W
Digital Ic Case Style
BGA
No. Of Pins
676
Pci Bus Type
I/O Controller Hub
Pci Express Base Spec
PCIe 1.1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Functional Description
5.17
5.17.1
5.17.2
Table 83.
Intel
®
ICH8 Family Datasheet
High Precision Event Timers
This function provides a set of timers that can be used by the operating system. The
timers are defined such that in the future, the operating system may be able to assign
specific timers to used directly by specific applications. Each timer can be configured to
cause a separate interrupt.
ICH8 provides three timers. The three timers are implemented as a single counter each
with its own comparator and value register. This counter increases monotonically. Each
individual timer can generate an interrupt when the value in its value register matches
the value in the main counter.
The registers associated with these timers are mapped to a memory space (much like
the I/O APIC). However, it is not implemented as a standard PCI function. The BIOS
reports to the operating system the location of the register space. The hardware can
support an assignable decode space; however, the BIOS sets this space prior to
handing it over to the operating system (See
operating system will move the location of these timers once it is set by the BIOS.
Timer Accuracy
The main counter is clocked by the 14.31818 MHz clock, synchronized into the
66.666 MHz domain. This results in a non-uniform duty cycle on the synchronized
clock, but does have the correct average period. The accuracy of the main counter is as
accurate as the 14.3818 MHz clock.
Interrupt Mapping
Mapping Option #1 (Legacy Replacement Option)
In this case, the Legacy Replacement Rout bit (LEG_RT_CNF) is set. This forces the
mapping found in
Legacy Replacement Routing
Mapping Option #2 (Standard Option)
In this case, the Legacy Replacement Rout bit (LEG_RT_CNF) is 0. Each timer has its
own routing control. The supported interrupt values are IRQ 20, 21, 22, and 23.
1. The timers are accurate over any 1 ms period to within 0.05% of the time specified
2. Within any 100 microsecond period, the timer reports a time that is up to two ticks
3. The timer is monotonic. It does not return the same value on two consecutive
Timer
in the timer resolution fields.
too early or too late. Each tick is less than or equal to 100 ns, so this represents an
error of less than 0.2%.
reads (unless the counter has rolled over and reached the same value).
0
1
2
Per IRQ Routing Field.
8259 Mapping
Table
IRQ0
IRQ8
83.
Per IRQ Routing Field
APIC Mapping
IRQ2
IRQ8
Section
6.4). It is not expected that the
In this case, the 8254 timer will
not cause any interrupts
In this case, the RTC will not cause
any interrupts.
Comment
203

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