NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 353

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LPC Interface Bridge Registers (D31:F0)
9.3.1
Intel
®
ICH8 Family Datasheet
TCW—Timer Control Word Register (LPC I/F—D31:F0)
I/O Address:
Default Value:
This register is programmed prior to any counter being accessed to specify counter
modes. Following component reset, the control words for each register are undefined
and each counter output is 0. Each timer must be programmed to bring it into a known
state.
There are two special commands that can be issued to the counters through this
register, the Read Back Command and the Counter Latch Command. When these
commands are chosen, several bits within this register are redefined. These register
formats are described in the following sub-sections:
RDBK_CMD—Read Back Command (LPC I/F—D31:F0)
The Read Back Command is used to determine the count value, programmed mode,
and current states of the OUT pin and Null count flag of the selected counter or
counters. Status and/or count may be latched in any or all of the counters by selecting
the counter during the register write. The count and status remain latched until read,
and further latch commands are ignored until the count is read. Both count and status
of the selected counters may be latched simultaneously by setting both bit 5 and bit 4
7:6
5:4
3:1
Bit
0
Counter Select — WO. The Counter Selection bits select the counter the control word
acts upon as shown below. The Read Back Command is selected when bits[7:6] are
both 1.
00 = Counter 0 select
01 = Counter 1 select
10 = Counter 2 select
11 = Read Back Command
Read/Write Select — WO. These bits are the read/write control bits. The actual
counter programming is done through the counter port (40h for counter 0, 41h for
counter 1, and 42h for counter 2).
00 = Counter Latch Command
01 = Read/Write Least Significant Byte (LSB)
10 = Read/Write Most Significant Byte (MSB)
11 = Read/Write LSB then MSB
Counter Mode Selection — WO. These bits select one of six possible modes of
operation for the selected counter.
Binary/BCD Countdown Select — WO.
0 = Binary countdown is used. The largest possible binary count is 2 16
1 = Binary coded decimal (BCD) count is used. The largest possible BCD count is 10 4
Bit Value
000b
001b
x10b
x11b
100b
101b
43h
All bits undefined
Mode 0 Out signal on end of count (=0)
Mode 1 Hardware retriggerable one-shot
Mode 2 Rate generator (divide by n counter)
Mode 3 Square wave output
Mode 4 Software triggered strobe
Mode 5 Hardware triggered strobe
Description
Attribute:
Size:
Mode
WO
8 bits
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