NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 615

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

EHCI Controller Registers (D29:F7, D26:F7)
15.2.2.7
15.2.2.8
Intel
®
ICH8 Family Datasheet
ASYNCLISTADDR—Current Asynchronous List Address
Register
Offset:
Default Value:
This 32-bit register contains the address of the next asynchronous queue head to be
executed. Since the ICH8 host controller operates in 64-bit mode (as indicated by a 1 in
64-bit Addressing Capability field in the HCCPARAMS register) (offset 08h, bit 0), then
the most significant 32 bits of every control data structure address comes from the
CTRLDSSEGMENT register (offset 08h). Bits [4:0] of this register cannot be modified by
system software and will always return 0’s when read. The memory structure
referenced by this physical memory pointer is assumed to be 32-byte aligned.
CONFIGFLAG—Configure Flag Register
Offset:
Default Value:
This register is in the suspend power well. It is only reset by hardware when the
suspend power is initially applied or in response to a host controller reset.
31:5
31:1
4:0
Bit
Bit
0
Link Pointer Low (LPL) — R/W. These bits correspond to memory address signals
[31:5], respectively. This field may only reference a Queue Head (QH).
Reserved. These bits are reserved and their value has no effect on operation.
Reserved. Read from this field will always return 0.
Configure Flag (CF) — R/W. Host software sets this bit as the last action in its process
of configuring the Host controller. This bit controls the default port-routing control logic.
Bit values and side-effects are listed below. See section 4 of the EHCI spec for
operation details.
0 = Port routing control logic default-routes each port to the UHCIs (default).
1 = Port routing control logic default-routes all ports to this host controller.
MEM_BASE + 38h–3Bh
00000000h
MEM_BASE + 60h–63h
00000000h
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W
32 bits
R/W
32 bits
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