NH82801HBM S LB9A Intel, NH82801HBM S LB9A Datasheet - Page 46

• Manufacturer Part Number: NH82801HBM S LB9A
• Description: CONTROLLER HUB, ICH8M, I/O, 82801HBM
• Manufacturer: Intel

Specifications of NH82801HBM S LB9A

• Power Dissipation Pd: 2.4W
• Digital Ic Case Style: BGA
• No. Of Pins: 676
• Pci Bus Type: I/O Controller Hub
• Pci Express Base Spec: PCIe 1.1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1.
46
Industry Specifications
Chapter 1. Introduction
Chapter 1 introduces the ICH8 and provides information on manual organization and
gives a general overview of the ICH8.
Chapter 2. Signal Description
Chapter 2
signal. Signals are arranged according to interface and details are provided as to the
drive characteristics (Input/Output, Open Drain, etc.) of all signals.
Chapter 3. Intel
Chapter 3
level in each suspend state, and their logic level before and after reset.
Chapter 4. Intel
Chapter 4
based system.
Chapter 5. Functional Description
Chapter 5
devices and functions in this manual are abbreviated using the following nomenclature;
Bus:Device:Function. This manual abbreviates buses as B0 and B1, devices as D8,
D27, D28, D29, D30 and D31 and functions as F0, F1, F2, F3, F4, F5, F6 and F7. For
example Device 31 Function 0 is abbreviated as D31:F0, Bus 1 Device 8 Function 0 is
abbreviated as B1:D8:F0. Generally, the bus number will not be used, and can be
considered to be Bus 0. Note that the ICH8’s external PCI bus is typically Bus 1, but
may be assigned a different number depending upon system configuration.
Chapter 6. Register and Memory Mappings
Chapter 6
and memory ranges decoded by the ICH8.
Chapter 7. Chipset Configuration Registers
Chapter 7
related to chipset configuration and not a specific interface (such as LPC, PCI, or PCI
Express). It contains the root complex register block, which describes the behavior of
the upstream internal link.
Universal Serial Bus Specification (USB), Revision 2.0
Advanced Configuration and Power Interface, Version
2.0 (ACPI)
Universal Host Controller Interface, Revision 1.1 (UHCI)
Enhanced Host Controller Interface Specification for
Universal Serial Bus, Revision 1.0 (EHCI)
Serial ATA Specification, Revision 2.5
Alert Standard Format Specification, Version 1.03
IEEE 802.3 Fast Ethernet
AT Attachment - 6 with Packet Interface (ATA/ATAPI - 6) http://T13.org (T13 1410D)
IA-PC HPET (High Precision Event Timers) Specification,
Revision 0.98a
provides a block diagram of the ICH8 and a detailed description of each
provides a complete list of signals, their associated power well, their logic
provides a list of each clock domain associated with the ICH8 in an ICH8
provides a detailed description of the functions in the ICH8. All PCI buses,
provides an overview of the registers, fixed I/O ranges, variable I/O ranges
provides a detailed description of all registers and base functionality that is
®
®
Specification
ICH8 Pin States
ICH8 and System Clock Domains
http://www.usb.org/developers/docs
http://www.acpi.info/spec.htm
http://developer.intel.com/design/
USB/UHCI11D.htm
http://developer.intel.com/
technology/usb/ehcispec.htm
http://www.serialata.org/
specifications.asp
http://www.dmtf.org/standards/asf
http://standards.ieee.org/
getieee802/
http://www.intel.com/
hardwaredesign/hpetspec.htm
Intel
Location
®
ICH8 Family Datasheet
Introduction