D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 761

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number:
D6417729RHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
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24.3.2
Table 24.6 Control Signal Timing
VccQ = 3.3 ± 0.3 V, Vcc = 1.55 V to 2.15 V, AVcc = 3.3 ± 0.3 V, Ta = –20 to 75°C
Notes: 1. RESETP, NMI, and IRQ5 to IRQ0 are asynchronous. Changes are detected at the
Item
RESETP pulse width
RESETP setup time *
RESETP hold time
RESETM pulse width
RESETM setup time
RESETM hold time
BREQ setup time
BREQ hold time
NMI setup time *
NMI hold time
IRQ5–IRQ0 setup time *
IRQ5–IRQ0 hold time
IRQOUT delay time
BACK delay time
STATUS1, STATUS0 delay time
Bus tri-state delay time 1
Bus tri-state delay time 2
Bus buffer-on time 1
Bus buffer-on time 2
2. t
3. In standby mode, t
Control Signal Timing
clock fall when the setup time shown is used. If the setup time cannot be used,
detection can be delayed until the next clock falls.
= t
When the clock multiplication ratio is changed, t
until STATUS (0-1) changes to reset (HH). When the clock multiplication ratio is
changed, RESETM must be kept low until STATUS (0-1) changes to reset (HH).
RESPW
OSC2
1
= t
(10 ms) when oscillation is stopped. In sleep mode, t
OSC1
1
1
(100 s) when XTAL oscillation is continued in standby mode, and t
RESMW
= t
OSC2
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RESPW
RESPS
RESPH
RESMW
RESMS
RESMH
BREQS
BREQH
NMIS
NMIH
IRQS
IRQH
IRQOD
BACKD
STD
BOFF1
BOFF2
BON1
BON2
(10 ms). In sleep mode, RESETM must be kept low
Min
20 *
20
4
20 *
6
34
6
4
10
4
10
4
0
0
0
0
RESPW
2
3
= t
Rev. 5.0, 09/03, page 713 of 806
Max
10
10
10
15
15
15
15
PLL1
RESPW
(100 s).
= t
Unit
tcyc
ns
ns
tcyc
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PLL1
(100 s).
Figure
24.11,
24.12
24.14
24.12
24.13
24.14,
24.15
RESPW

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