D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 367
D6417729RHF200BV
Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417729RF133BV.pdf
(857 pages)
Specifications of D6417729RHF200BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number:
D6417729RHF200BV
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Wait State Control: Wait state insertion on the basic interface can be controlled by the WCR2
settings. If the WCR2 wait specification bits corresponding to a particular area are not zero, a
software wait is inserted in accordance with that specification. For details, see section 11.2.4, Wait
State Control Register 2 (WCR2).
The specified number of Tw cycles are inserted as wait cycles using the basic interface wait timing
shown in figure 11.10.
When software wait insertion is specified by WCR2, the external wait input WAIT signal is also
sampled. WAIT pin sampling is shown in figure 11.11. A 2-cycle wait is specified as a software
wait. Sampling is performed at the transition from the Tw state to the T
WAIT signal has no effect if asserted in the T
Read
Write
Figure 11.10 Basic Interface Wait Timing (Software Wait Only)
CKIO
A25 to A0
CSn
RD/WR
RD
D31 to D0
WEn
D31 to D0
BS
T
1
1
cycle or the first Tw cycle.
Tw
Rev. 5.0, 09/03, page 319 of 806
2
T
state; therefore, if the
2
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