D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 128

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 2.31 Correspondence between DSP Instruction Operands and Registers
When writing parallel instructions, the B-field instruction is written first, followed by the A-field
instruction. A sample parallel processing program is shown in figure 2.16.
Square brackets mean that the contents can be omitted.
The no operation instructions NOPX and NOPY can be omitted. Table 2.32 gives an overview of
the B field in parallel operation instructions.
A semicolon is the instruction line delimiter, but this can also be omitted. If the semicolon
delimiter is used, the area to the right of the semicolon can be used as a comment field. This has
the same function as with conventional SH tools.
The DSR register condition code bit (DC) is updated on the basis of the result of an unconditional
ALU or shift operation instruction. Conditional instructions do not update the DC bit. Multiply
instructions, also, do not update the DC bit. The DC bit updating conditions are determined by bits
CS0 to CS2 in the DSR register. The DC bit update rules are shown in table 2.33.
Rev. 5.0, 09/03, page 80 of 806
Register
A0
A1
M0
M1
X0
X1
Y0
Y1
DCF
PADD A0, M0, A0
PINC X1, A1
PCMP X1, M0
Sx
Yes
Yes
Yes
Yes
Figure 2.16 Sample Parallel Instruction Program
ALU and BPU Operations
Sy
Yes
Yes
Yes
Yes
PMULS X0, Y0, M0
Dz
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
MOVX.W @R4+, X0
MOVX.W A0, @R5+R8
MOVX.W @R4+, X0
Du
Yes
Yes
Yes
Yes
Se
Yes
Yes
Yes
Yes
Multiply Operations
MOVY.W @R6+, Y0 [;]
MOVY.W @R7+, Y0 [;]
[NOPY] [;]
Sf
Yes
Yes
Yes
Yes
Dg
Yes
Yes
Yes
Yes