D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 193

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 5.2
LRU (5–0)
000000, 000100, 010100, 100000, 110000, 110100
000001, 000011, 001011, 100001, 101001, 101011
000110, 000111, 001111, 010110, 011110, 011111
111000, 111001, 111011, 111100, 111110, 111111
5.1.3
Table 5.3 shows details of the cache control registers.
Table 5.3
Register
Cache control register
Cache control register 2
Note: * When address translation by the MMU does not apply, the address in parentheses should
5.2
5.2.1
The cache is enabled or disabled using the CE bit in the cache control register (CCR). CCR also
has a CF bit (which invalidates all cache entries), and WT and CB bits (which select either write-
through mode or write-back mode). Programs that change the contents of the CCR register should
be placed in address space that is not cached. When updating the contents of the CCR register, bit
4 must always be cleared to 0. Figure 5.2 shows the configuration of the CCR register.
be used.
Register Configuration
Register Descriptions
Cache Control Register (CCR)
LRU and Way Replacement
Register Configuration
Abbr.
CCR
CCR2
R/W
R/W
W
H'00000000
Initial Value
H'00000000
Way to be Replaced
3
2
1
0
Rev. 5.0, 09/03, page 145 of 806
H'FFFFFFEC
H'040000B0
(H'A40000B0) *
Address
Access Size
32
32