D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 51

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Item
Clock pulse
generator (CPG)
Memory
management
unit (MMU)
Cache memory
X/Y memory
Interrupt
controller (INTC)
Features
Clock mode: Input clock can be selected from external input (EXTAL or
CKIO) or crystal oscillator
Three types of clocks generated:
Power-down modes:
One-channel watchdog timer
4 Gbytes of address space, 256 address spaces (8-bit ASID)
Page unit sharing
Supports multiple page sizes: 1 kbyte or 4 kbytes
128-entry, 4-way set associative TLB
Supports software selection of replacement method and random-replacement
algorithms
16-kbyte cache, mixed instruction/data
256 entries, 4-way set associative, 16-byte block length
Write-back, write-through, LRU replacement algorithm
1-stage write-back buffer
Maximum 2 ways of the cache can be locked
User-selectable mapping mechanism
Three independent read/write ports
8-kbyte RAM each for X and Y memory
7 external interrupt pins (NMI, IRQ5–IRQ0)
Level interrupt pins: 15 levels
16 port interrupt pins (PINT15–PINT0)
On-chip peripheral interrupts: Priority level set for each module
CPU clock: 1–24 times the input clock, maximum 200 MHz
Bus clock: 1–4 times the input clock, maximum 66.67 MHz
Peripheral clock: 1/4–4 times the input clock, maximum 33.34 MHz
Sleep mode
Standby mode
Module standby mode
Fixed mapping for realtime applications (privileged DSP mode)
Automatic mapping through TLB (user DSP mode)
8-/16-/32-bit access from the CPU
Maximum two 16-bit accesses from the DSP
8-/16-/32-bit and 16-byte access from the DMAC
Rev. 5.0, 09/03, page 3 of 806